The present invention is related to the field of semiconductor devices and more particularly, a method and design for reducing coupling in adjacent interconnects in a semiconductor device.
Continuous advancements in the field of semiconductor fabrication have resulted in integrated circuits with millions of deep sub-micron transistor geometries connected by closely spaced signal lines (interconnects). The coupling noise between adjacent signal lines in devices with single and multiple interconnect levels has become a significant design concern. Coupling noise is extremely sensitive to scaling and is considered to be a major obstacle to achieving reliable, high speed and high density integrated circuits. In semiconductor memories particularly, the degree of coupling noise due to closely spaced signal lines in the memory cell array is a constraining factor on the speed and reliable operation of the device.
Historically, one method of reducing coupling noise between adjacent interconnects includes the placement of shielding lines between adjacent signal lines. Typically, the shielding lines are tied to a constant voltage supply such as VDD or ground. Shielding lines are considered to be one of the best methods for reducing coupling noise, but the penalty area incurred by shielding is so significant that the shielding line method can not be extensively used for applications such as semiconductor memories in which the number of bit lines and word lines is extremely large.
A second method of reducing coupling noise includes the use of bit-line/bit-line-bar pairs that are twisted such that, at a first location the bit-line interconnect is adjacent to a neighboring bit-line while, at a second location, the bit-line-bar interconnect is adjacent to the neighboring bit line. The twisting pair method can reduce coupling noise by almost half, but is typically limited to paired lines that switch simultaneously such as the bit line pairs in a semiconductor memory array. The twisting line method typically cannot be applied to decoder output lines or other applications where only one output is switching to either high or low while the rest of the outputs remain un-switched. Therefore, it would be desirable to implement a method of reducing coupling noise in densely spaced integrated circuits without significantly increasing the area of the array using a method that would be applicable to applications in which only one output transitions at a time.